Hardness assurance levels and requirements for single event effects testing of integrated circuits

Testing and Hardness Assurance Guidelines for Single Event Transients (SETs) in Linear Devices

Metrology Requirements for Manufacturing 3d Integrated Circuits

Three-dimensional integrated circuits (3D ICs) introduce wafer bonding and Through Silicon Vias (TSVs) as new modules, thus extending manufacturing requirements beyond CMOS. A 3D IC with a photosensor is taken as an example to further analyze the resulting new metrology requirements for mass production. For the wafer bond module, data on defects before and after bonding, bond interface adhesion...

Single-event Gate Rupture in Power Mosfets: a New Radiation Hardness Assurance Approach

Title of Document: SINGLE-EVENT GATE RUPTURE IN POWER MOSFETS: A NEW RADIATION HARDNESS ASSURANCE APPROACH Jean-Marie Lauenstein, Ph.D. Candidate, 2011 Directed By: Professor Neil Goldsman, Department of Electrical and Computer Engineering Almost every space mission uses vertical power metal-semiconductor-oxide field-effect transistors (MOSFETs) in its power-supply circuitry. These devices can ...

Testing and fault tolerance of integrated circuits

Today, the technological advances reduce the size of electronic components to the nanometer dimensions. This miniaturization makes manufacturing processes more complex and less reliable. This implies that it becomes very difficult to manufacture a circuit without any defects. Therefore, the manufacturing yield could decline significantly. To improve yield, fault-tolerant structures could be use...

Testing Superconductor Logic Integrated Circuits

——Superconductor logic has the potential of extremely low-power consumption and ultra-fast digital signal processing. Unfortunately, the obtained yield of the present processes is low and specific faults occur. This paper deals with fault-modelling, Design-for-Test structures, and ATPG for these integrated circuits. Index Terms—— Fault modelling, Design-for-Test, Defect Monitor Structures, ATPG